GitHub

9-Bit ISA Processor — SECDED Hamming Code

UCSD CSE 141L — Computer Architecture Lab — Spring 2023 A custom single-cycle processor designed in SystemVerilog with a 9-bit instruction set architecture (ISA). The processor runs two programs ...
IEEE

Ultra-Low Energy Consumed GDI Based Hamming Code High Speed Signal Processing Communication System for IOT Application

Abstract: In signal processing, the concepts of encoding and decoding play pivotal roles in various applications, ranging from telecommunications to data compression. Encoders and decoders are ...
GitHub

hamming_decoder.v

assign {d4,d3,d2,p3,d1,p2,p1} = code_in ; assign data_out [0] = corrected_code[2]; assign data_out [1] = corrected_code [4]; assign data_out [2] = corrected_code[5 ...
IEEE

Quantum-Inspired FPGA Design of an Energy–Efficient Hamming (7,4) Encoder–Decoder using Hybrid Peres–Toffoli and Double-Feynman Gates for Fault-Tolerant Communication

Abstract: Effective and low-power error-control coding techniques are necessary for reliable data transmission in faulttolerant communication systems. In this research, a unique hybrid of ...